Exemplary embodiments of the present invention relate to a semiconductor design technology, and more particularly, to a system, a semiconductor device, and a method for controlling a refresh operation of a plurality of stacked semiconductor chips.
In general, a semiconductor memory cell performs a refresh operation by periodically activating a word line in order to substantially maintain data.
However, when a plurality of banks of a semiconductor memory device activate corresponding word lines, a peak current may increase.
In order to reduce the peak current, banks may be grouped (e.g., into groups of two, four, etc.) and then operated on a group by group basis.
For example, if a semiconductor memory cell includes eight banks, the banks BANK<0:7> may simultaneously perform the refresh operation, the banks BANK<0:7> may be divided into two groups such as banks BANK<0:3> and banks BANK<4:7> to perform the refresh operation, or the banks BANK<0:7> may be divided into banks BANK<0:1>, banks BANK<2:3>, banks BANK<4:5> and banks BANK<6:7> to perform the refresh operation.
Meanwhile, a demand for a high density semiconductor device is increasing, resulting in the improvement of the integration degree thereof through a scaling-down method that reduces a line width. However, recently, such a method of scaling-down has reached a technical limit. In order to address the technical limit, various types of stacked package technologies are being developed.
Particularly, a stacked semiconductor package using conductive lines which are formed through a semiconductor chip (also referred to as a through silicon via (TSV)) has bee proposed. According to a known fabrication method of the stacked semiconductor package, a via hole is formed through a semiconductor chip, a conductive material is filled in the via hole to form an electrode referred to as a through silicon via, and an upper semiconductor chip is electrically coupled to a lower semiconductor chip through the through silicon via.
FIG. 1 is a diagram illustrating a known stacked semiconductor chip package using a through silicon via (TSV).
Referring to FIG. 1, in such a semiconductor chip package, since the number of banks in the stacked semiconductor chip package increases in proportion to the number of slave chips, a peak current may increase and a charge pump area for supplying a supply voltage may also increase.